TIMOUT=00, TIMRST=000, TIMENA=000, TSTOP=00, TIMDEC=00, TIMDIS=000, TSTART=0
Timer Configuration N Register
| TSTART | Timer Start Bit 0 (0): Start bit disabled 1 (1): Start bit enabled |
| TSTOP | Timer Stop Bit 0 (00): Stop bit disabled 1 (01): Stop bit is enabled on timer compare 2 (10): Stop bit is enabled on timer disable 3 (11): Stop bit is enabled on timer compare and timer disable |
| TIMENA | Timer Enable 0 (000): Timer always enabled 1 (001): Timer enabled on Timer N-1 enable 2 (010): Timer enabled on Trigger high 3 (011): Timer enabled on Trigger high and Pin high 4 (100): Timer enabled on Pin rising edge 5 (101): Timer enabled on Pin rising edge and Trigger high 6 (110): Timer enabled on Trigger rising edge 7 (111): Timer enabled on Trigger rising or falling edge |
| TIMDIS | Timer Disable 0 (000): Timer never disabled 1 (001): Timer disabled on Timer N-1 disable 2 (010): Timer disabled on Timer compare 3 (011): Timer disabled on Timer compare and Trigger Low 4 (100): Timer disabled on Pin rising or falling edge 5 (101): Timer disabled on Pin rising or falling edge provided Trigger is high 6 (110): Timer disabled on Trigger falling edge |
| TIMRST | Timer Reset 0 (000): Timer never reset 2 (010): Timer reset on Timer Pin equal to Timer Output 3 (011): Timer reset on Timer Trigger equal to Timer Output 4 (100): Timer reset on Timer Pin rising edge 6 (110): Timer reset on Trigger rising edge 7 (111): Timer reset on Trigger rising or falling edge |
| TIMDEC | Timer Decrement 0 (00): Decrement counter on FlexIO clock, Shift clock equals Timer output. 1 (01): Decrement counter on Trigger input (both edges), Shift clock equals Timer output. 2 (10): Decrement counter on Pin input (both edges), Shift clock equals Pin input. 3 (11): Decrement counter on Trigger input (both edges), Shift clock equals Trigger input. |
| TIMOUT | Timer Output 0 (00): Timer output is logic one when enabled and is not affected by timer reset 1 (01): Timer output is logic zero when enabled and is not affected by timer reset 2 (10): Timer output is logic one when enabled and on timer reset 3 (11): Timer output is logic zero when enabled and on timer reset |